The present invention relates to an image display capable of multilevel illumination and more specifically to an image display with a sufficiently small display characteristic variation among pixels.
Referring to FIGS. 16, 17 and 18, two conventional technologies will be described.
FIG. 16 shows a configuration of a light emitting display device. Pixels 205 each having an organic electroluminescent device 204 as a pixel light emitting device are arranged in matrix in a display area and are connected to external drive circuits via gate lines 206, source lines 207 and power supply lines 208. In each pixel 205, the source line 207 is connected to a gate of a power TFT 203 and one end of a storage capacitor 202 through a logic TFT (thin-film transistor) 201, with one end of the power TFT 203 and the other end of the storage capacitor 202 connected in common to the power supply line 208. The other end of the power TFT 203 is connected to a common power supply terminal through the organic electroluminescent device 204.
An operation of this first example of the conventional technology will be described. When the gate line 206 opens or closes the logic TFTs 201 on a predetermined pixel line, a signal voltage that has been supplied from the external drive circuit to the source line 207 is input to the gate of the power TFT 203 and to the storage capacitor 202 where it is held. The power TFT 203 supplies a drive current according to the signal voltage to the organic electroluminescent device 204, causing it to illuminate in response to the signal voltage.
Such a conventional technology is detailed in, for example, JP-A-8-241048 (laid open on Sep. 17, 1996).
While in this conventional example the term “organic electroluminescent device” is used in conformity with the known example cited above, the device is often referred to as an organic light emitting diode (OLED) in recent years. In this specification, the latter designation will be used.
Next, by referring to FIG. 17 and FIG. 18, another conventional technology will be described.
FIG. 17 shows a configuration of a light emitting display device using the second conventional technology. Pixels 215 each having an organic light emitting diode (OLED) 214 as a pixel light emitting device are arranged in matrix. In FIG. 17 only one pixel is shown for the sake of simplicity. The pixels 215 are connected to external drive circuits through select lines 216, data lines 217 and power supply lines 218. In each pixel 215, the data line 217 is connected through an input TFT 211 to one end of a cancel capacitor 210, the other end of which is connected to a gate of a drive TFT 213, one end of a storage capacitor 212 and one end of an auto-zero switch 221. The other end of the storage capacitor 212 and one end of the drive TFT 213 are connected in common to the power supply line 218. The other ends of the drive TFT 213 and the auto-zero switch 221 are connected in common to one end of the an EL switch 223, the other end of which is connected through an OLED 214 to a common power supply terminal. The auto-zero switch 221 and the EL switch 223 are constructed of TFTs and their gates are connected to an auto-zero input line (AZ) 222 and an EL input line (AZB) 224, respectively.
Now, the operation of the second conventional technology will be explained by referring to FIG. 18. FIG. 18 shows drive waveforms of the data line 217, auto-zero input line (AZ) 222, EL input line (AZB) 224, and select line 216 when a display signal is supplied to the pixels. The pixels are constructed of a p-channel TFT and thus the drive waveforms of FIG. 18 represent an off-state of the TFTs when they are at high level (on high voltage side) and an on-state when they are at low level (on low voltage side).
At timing (1) in the figure, the select line 216 is on, the auto-zero input line (AZ) 222 is on and the EL input line (AZB) 224 is off. In response to this, the input TFT 211 turns on, the auto-zero switch 221 turns on and EL switch 223 turns off. This causes an off-level signal voltage, which has been input to the data line 217, to be fed to one end of the cancel capacitor 210. At the same time, the turn-on of the auto-zero switch 221 resets a gate-source voltage of the diode-connected drive TFT 213 to (voltage of power supply line 218+Vth), where Vth is a threshold voltage of the drive TFT 213. This operation, when an off-level signal voltage is input to the pixel, causes the gate of the drive TFT 213 to be auto-zero-biased to the threshold voltage.
Next, at timing (2) in the figure, the auto-zero input line (AZ) 222 is off and the data line 217 receives a signal of a predetermined level. As a result, the auto-zero switch 221 turns off and an on-level signal is fed to one end of the cancel capacitor 210. This operation causes the gate voltage of the drive TFT 213 to change by an added signal input level from the level that existed under the auto-zero bias condition.
Next, at timing (3) in the figure, the select line is off and the EL input line (AZB) 224 is on. As a result, the input TFT 211 turns off to store in the cancel capacitor 210 the signal input level that was applied to the cancel capacitor 210 through the turned-on input TFT 211. At the same time, the EL switch 223 is turned on. This operation fixes the gate of the drive TFT 213 at a voltage to which the gate voltage has been increased from the threshold voltage by the added signal input level. The signal current driven by the drive TFT 213 illuminates the OLED 214 at a predetermined brightness.
These conventional technologies are detailed, for example, in DIGEST of Technical Papers, SID98, pp. 11-14.